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  8. Feb 27, 2014
    • Felix Fietkau's avatar
      cns3xxx: ethernet - clean up tx descs only when needed · 8665c579
      Felix Fietkau authored
      
      We already clean up tx descriptors in the napi eth_poll() function so it
      would likely be rare to run out of available descriptors in eth_xmit. Thus
      we can clean them up only when needed and return busy only when we
      still don't have enough.
      
      Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
      
      SVN-Revision: 39762
      8665c579
    • Felix Fietkau's avatar
      cns3xxx: ethernet - resolve SMP issue · 96eb3d88
      Felix Fietkau authored
      
      The combination of r35942 and r35952 causes an issue where eth_schedule_poll()
      can be called from a different CPU between the call to napi_complete() and the
      setting of cur_index which can break the rx ring accounting and cause ethernet
      latency and/or ethernet stalls.  The issue can be easilly created by adding
      a couple of artificial delays such as:
      
      @@ -715,6 +715,7 @@ static int eth_poll(struct napi_struct *napi, int budget)
      
       	if (!received) {
       		napi_complete(napi);
      +udelay(1000);
       		enable_irq(IRQ_CNS3XXX_SW_R0RXC);
       	}
      
      @@ -727,6 +728,7 @@ static int eth_poll(struct napi_struct *napi, int budget)
       	rx_ring->cur_index = i;
      
       	wmb();
      +udelay(1000);
       	enable_rx_dma(sw);
      
       	return received;
      
      This patch moves the setting of cur_index back up where it needs to be and
      addresses the original corner case that r35942 was trying to catch in an
      improved fashion by checking to see if the rx descriptor ring has become
      full before interrupts were re-enabled so that a poll can be scheduled again
      and avoid an rx stall caused by rx interrupts ceasing to fire again.
      
      Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
      
      SVN-Revision: 39761
      96eb3d88
    • Luka Perkov's avatar
      imx6: optimize for NEON FPU hardware · f7f117b8
      Luka Perkov authored
      
      The IMX6 SoC uses an ARM Cortext-A9 which has both NEON and VFPv3 hardware
      blocks.  This will tune gcc to use neon instead of vfpv3 which will outperform
      VFPv3.
      
      Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
      
      SVN-Revision: 39760
      f7f117b8
    • Luka Perkov's avatar
      imx6: enable FPU for hard float · 6752d4cb
      Luka Perkov authored
      
      The OpenWrt build system uses MACHINE_FEATURES of fpu to set the HAS_FPU which
      in turn sets the default of CONFIG_SOFT_FLOAT as well as uClibc configuration.
      As the IMX6 SoC has both vfpv3 and NEON hardware support we want to add fpu
      to the feature list.  This will default the IMX6 target to use -mfloat-abi=hard
      which will the be most efficient use of floating point.
      
      When switching to hard float, we also need to enable VFP support in the kernel.
      
      Signed-off-by: default avatarTim Harvey <tharvey@gateworks.com>
      
      SVN-Revision: 39759
      6752d4cb
    • Felix Fietkau's avatar
      ath5k: fix enabling 5/10 mhz channel bandwidth support · 95c97bf2
      Felix Fietkau authored
      
      Signed-off-by: default avatarFelix Fietkau <nbd@openwrt.org>
      
      SVN-Revision: 39758
      95c97bf2
    • Steven Barth's avatar
      netifd: Reintroduce link-layer sensing (thx Hans Decker, Karl Vogel) · 1b3a8683
      Steven Barth authored
      SVN-Revision: 39757
      1b3a8683
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