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Moved config back to config-default, but left the FSG3 profile config non-working in the config directory as a reminder that it has to be changed over to the new scheme when that's ready.

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vlynq cleanups: * drivers can now set a clock divisor * irq handling cleanup, drivers now can handle error irqs themselves * style cleanup

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disable dsp freq use for vlynq bus clock init, disable external clocking (it locks up on c54apra2+) and revert to internal clocking trying various clock divisors. cleanup: * remove volative and use readl & writel accessors instead * use set_irq_chip & friends for irq setup * use kzalloc instead of kmalloc * secure VINT_VECTOR macro argument * remove unused vlynq_local_id function

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Fix comments to the mtd driver (see http://www.linux-mips.org/archives/linux-mips/2007-09/msg00064.html)

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