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dd092fd1

Commit dd092fd1 authored 12 years ago by Gabor Juhos

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ramips: set clk_is_20mhz for rt2x00 on RT3352/RT5350


Signed-off-by: Daniel Golle <dgolle@allnet.de>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

SVN-Revision: 34270

parent 6c1fbb2d

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target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h 2 additions, 0 deletions

...ips/files/arch/mips/include/asm/mach-ralink/rt305x_regs.h
target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c 8 additions, 0 deletions

target/linux/ramips/files/arch/mips/ralink/rt305x/devices.c

with 10 additions and 0 deletions

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