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fix SPI message control handling for BCM6338/6348
BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of 16-bits. We were previously using a 16-bits write which corrupted the first byte of the TX FIFO. Also the message type was always set to Full-duplex even in the case of half-duplex messages. SVN-Revision: 32409
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- target/linux/brcm63xx/patches-3.3/016-spi-bcm63xx-fix-bcm6348-38.patch 128 additions, 0 deletions...brcm63xx/patches-3.3/016-spi-bcm63xx-fix-bcm6348-38.patch
- target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch 1 addition, 1 deletion....3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch
- target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch 1 addition, 1 deletion...3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch
- target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch 2 additions, 2 deletions.../316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch
- target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch 1 addition, 1 deletion.../patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch
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