bcm53xx: backport spi-nor patches from 3.18-rc1

Signed-off-by: Rafał Miłecki <zajec5@gmail.com>

SVN-Revision: 43030

target/linux/bcm53xx/patches-3.14/002-mtd-spi-nor-queued-for-3.18.patch → target/linux/bcm53xx/patches-3.14/002-mtd-spi-nor-from-3.18.patch

@@ -28,7 +28,42 @@
  static int spi_nor_read(struct mtd_info *mtd, loff_t from, size_t len,
  			size_t *retlen, u_char *buf)
  {
-@@ -958,7 +953,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+@@ -920,7 +915,6 @@ int spi_nor_scan(struct spi_nor *nor, co
+ 			enum read_mode mode)
+ {
+ 	struct flash_info		*info;
+-	struct flash_platform_data	*data;
+ 	struct device *dev = nor->dev;
+ 	struct mtd_info *mtd = nor->mtd;
+ 	struct device_node *np = dev->of_node;
+@@ -931,34 +925,12 @@ int spi_nor_scan(struct spi_nor *nor, co
+ 	if (ret)
+ 		return ret;
+ 
+-	/* Platform data helps sort out which chip type we have, as
+-	 * well as how this board partitions it.  If we don't have
+-	 * a chip ID, try the JEDEC id commands; they'll work for most
+-	 * newer chips, even if we don't recognize the particular chip.
+-	 */
+-	data = dev_get_platdata(dev);
+-	if (data && data->type) {
+-		const struct spi_device_id *plat_id;
+-
+-		for (i = 0; i < ARRAY_SIZE(spi_nor_ids) - 1; i++) {
+-			plat_id = &spi_nor_ids[i];
+-			if (strcmp(data->type, plat_id->name))
+-				continue;
+-			break;
+-		}
+-
+-		if (i < ARRAY_SIZE(spi_nor_ids) - 1)
+-			id = plat_id;
+-		else
+-			dev_warn(dev, "unrecognized id %s\n", data->type);
+-	}
+-
+ 	info = (void *)id->driver_data;
+ 
  	if (info->jedec_id) {
  		const struct spi_device_id *jid;
  
@@ -37,3 +72,35 @@
  		if (IS_ERR(jid)) {
  			return PTR_ERR(jid);
  		} else if (jid != id) {
+@@ -990,11 +962,8 @@ int spi_nor_scan(struct spi_nor *nor, co
+ 		write_sr(nor, 0);
+ 	}
+ 
+-	if (data && data->name)
+-		mtd->name = data->name;
+-	else
++	if (!mtd->name)
+ 		mtd->name = dev_name(dev);
+-
+ 	mtd->type = MTD_NORFLASH;
+ 	mtd->writesize = 1;
+ 	mtd->flags = MTD_CAP_NORFLASH;
+@@ -1018,6 +987,7 @@ int spi_nor_scan(struct spi_nor *nor, co
+ 	    nor->wait_till_ready == spi_nor_wait_till_ready)
+ 		nor->wait_till_ready = spi_nor_wait_till_fsr_ready;
+ 
++#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
+ 	/* prefer "small sector" erase if possible */
+ 	if (info->flags & SECT_4K) {
+ 		nor->erase_opcode = SPINOR_OP_BE_4K;
+@@ -1025,7 +995,9 @@ int spi_nor_scan(struct spi_nor *nor, co
+ 	} else if (info->flags & SECT_4K_PMC) {
+ 		nor->erase_opcode = SPINOR_OP_BE_4K_PMC;
+ 		mtd->erasesize = 4096;
+-	} else {
++	} else
++#endif
++	{
+ 		nor->erase_opcode = SPINOR_OP_SE;
+ 		mtd->erasesize = info->sector_size;
+ 	}

target/linux/bcm53xx/patches-3.14/400-mtd-move-support-for-struct-flash_platform_data-into.patch

---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -915,7 +915,6 @@ int spi_nor_scan(struct spi_nor *nor, co
- 			enum read_mode mode)
- {
- 	struct flash_info		*info;
--	struct flash_platform_data	*data;
- 	struct device *dev = nor->dev;
- 	struct mtd_info *mtd = nor->mtd;
- 	struct device_node *np = dev->of_node;
-@@ -926,28 +925,6 @@ int spi_nor_scan(struct spi_nor *nor, co
- 	if (ret)
- 		return ret;
- 
--	/* Platform data helps sort out which chip type we have, as
--	 * well as how this board partitions it.  If we don't have
--	 * a chip ID, try the JEDEC id commands; they'll work for most
--	 * newer chips, even if we don't recognize the particular chip.
--	 */
--	data = dev_get_platdata(dev);
--	if (data && data->type) {
--		const struct spi_device_id *plat_id;
--
--		for (i = 0; i < ARRAY_SIZE(spi_nor_ids) - 1; i++) {
--			plat_id = &spi_nor_ids[i];
--			if (strcmp(data->type, plat_id->name))
--				continue;
--			break;
--		}
--
--		if (i < ARRAY_SIZE(spi_nor_ids) - 1)
--			id = plat_id;
--		else
--			dev_warn(dev, "unrecognized id %s\n", data->type);
--	}
--
- 	info = (void *)id->driver_data;
- 
- 	if (info->jedec_id) {
-@@ -985,11 +962,8 @@ int spi_nor_scan(struct spi_nor *nor, co
- 		write_sr(nor, 0);
- 	}
- 
--	if (data && data->name)
--		mtd->name = data->name;
--	else
-+	if (!mtd->name)
- 		mtd->name = dev_name(dev);
--
- 	mtd->type = MTD_NORFLASH;
- 	mtd->writesize = 1;
- 	mtd->flags = MTD_CAP_NORFLASH;

target/linux/bcm53xx/patches-3.14/401-mtd-spi-nor-add-Kconfig-option-to-disable-4K-sectors.patch

---- a/drivers/mtd/spi-nor/Kconfig
-+++ b/drivers/mtd/spi-nor/Kconfig
-@@ -7,6 +7,20 @@ menuconfig MTD_SPI_NOR
- 
- if MTD_SPI_NOR
- 
-+config MTD_SPI_NOR_USE_4K_SECTORS
-+	bool "Use small 4096 B erase sectors"
-+	default y
-+	help
-+	  Many flash memories support erasing small (4096 B) sectors. Depending
-+	  on the usage this feature may provide performance gain in comparison
-+	  to erasing whole blocks (32/64 KiB).
-+	  Changing small part of flash content is usually faster with small
-+	  sectors. On the other hand erasing should be faster when using 64 KiB
-+	  block instead of 16 × 4 KiB sectors.
-+
-+	  Please note that some tools/drivers/filesystems may not work with
-+	  4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
-+
- config SPI_FSL_QUADSPI
- 	tristate "Freescale Quad SPI controller"
- 	depends on ARCH_MXC
---- a/drivers/mtd/spi-nor/spi-nor.c
-+++ b/drivers/mtd/spi-nor/spi-nor.c
-@@ -987,6 +987,7 @@ int spi_nor_scan(struct spi_nor *nor, co
- 	    nor->wait_till_ready == spi_nor_wait_till_ready)
- 		nor->wait_till_ready = spi_nor_wait_till_fsr_ready;
- 
-+#ifdef CONFIG_MTD_SPI_NOR_USE_4K_SECTORS
- 	/* prefer "small sector" erase if possible */
- 	if (info->flags & SECT_4K) {
- 		nor->erase_opcode = SPINOR_OP_BE_4K;
-@@ -994,7 +995,9 @@ int spi_nor_scan(struct spi_nor *nor, co
- 	} else if (info->flags & SECT_4K_PMC) {
- 		nor->erase_opcode = SPINOR_OP_BE_4K_PMC;
- 		mtd->erasesize = 4096;
--	} else {
-+	} else
-+#endif
-+	{
- 		nor->erase_opcode = SPINOR_OP_SE;
- 		mtd->erasesize = info->sector_size;
- 	}

target/linux/bcm53xx/patches-3.14/404-mtd-bcm53xxspiflash-new-driver-for-SPI-flahes-on-Bro.patch

 --- a/drivers/mtd/spi-nor/Kconfig
 +++ b/drivers/mtd/spi-nor/Kconfig
-@@ -28,4 +28,10 @@ config SPI_FSL_QUADSPI
+@@ -14,4 +14,10 @@ config SPI_FSL_QUADSPI
  	  This enables support for the Quad SPI controller in master mode.
  	  We only connect the NOR to this controller now.