From eed2f24c0d1138e9c46befd464548de538f0bb60 Mon Sep 17 00:00:00 2001 From: Felix Fietkau <nbd@nbd.name> Date: Thu, 9 Jun 2016 19:09:23 +0200 Subject: [PATCH] kernel: fix mips MT_SMP kernel crash on cache flush Signed-off-by: Felix Fietkau <nbd@nbd.name> --- .../100-MIPS-fix-MT_SMP-cacheflush.patch | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 target/linux/generic/patches-4.4/100-MIPS-fix-MT_SMP-cacheflush.patch diff --git a/target/linux/generic/patches-4.4/100-MIPS-fix-MT_SMP-cacheflush.patch b/target/linux/generic/patches-4.4/100-MIPS-fix-MT_SMP-cacheflush.patch new file mode 100644 index 0000000000..14a10ba147 --- /dev/null +++ b/target/linux/generic/patches-4.4/100-MIPS-fix-MT_SMP-cacheflush.patch @@ -0,0 +1,17 @@ +Fix crash on cache flush with the MT_SMP variant + +Signed-off-by: Felix Fietkau <nbd@nbd.name> + +--- a/arch/mips/mm/c-r4k.c ++++ b/arch/mips/mm/c-r4k.c +@@ -60,8 +60,10 @@ static inline void r4k_on_each_cpu(void + * to restrict that call when a CM is not present because both + * CM-based SMP protocols (CMP & CPS) restrict index-based cache ops. + */ ++#ifndef CONFIG_MIPS_MT_SMP + if (!mips_cm_present()) + smp_call_function_many(&cpu_foreign_map, func, info, 1); ++#endif + func(info); + preempt_enable(); + } -- GitLab