From bfe65eaf7a92bf4be316b3bea635233b57f7dc85 Mon Sep 17 00:00:00 2001
From: John Crispin <john@openwrt.org>
Date: Thu, 25 Jul 2013 20:54:51 +0000
Subject: [PATCH] lantiq: remove stale phy register setup properties from dts
 files

Signed-off-by: John Crispin <blogic@openwrt.org>

SVN-Revision: 37544
---
 target/linux/lantiq/dts/EASY80920.dtsi | 5 -----
 target/linux/lantiq/dts/FRITZ3370.dts  | 4 ----
 target/linux/lantiq/dts/TDW8970.dts    | 4 ----
 target/linux/lantiq/dts/VG3503J.dts    | 2 --
 4 files changed, 15 deletions(-)

diff --git a/target/linux/lantiq/dts/EASY80920.dtsi b/target/linux/lantiq/dts/EASY80920.dtsi
index 4aec4aabd3..4013610667 100644
--- a/target/linux/lantiq/dts/EASY80920.dtsi
+++ b/target/linux/lantiq/dts/EASY80920.dtsi
@@ -205,27 +205,22 @@
 				phy0: ethernet-phy@0 {
 					reg = <0x0>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy1: ethernet-phy@1 {
 					reg = <0x1>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy5: ethernet-phy@5 {
 					reg = <0x5>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy11: ethernet-phy@11 {
 					reg = <0x11>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy13: ethernet-phy@13 {
 					reg = <0x13>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 			};
 		};
diff --git a/target/linux/lantiq/dts/FRITZ3370.dts b/target/linux/lantiq/dts/FRITZ3370.dts
index dd323dd67d..c7069b2d0b 100644
--- a/target/linux/lantiq/dts/FRITZ3370.dts
+++ b/target/linux/lantiq/dts/FRITZ3370.dts
@@ -192,22 +192,18 @@
 				phy0: ethernet-phy@0 {
 					reg = <0x0>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy1: ethernet-phy@1 {
 					reg = <0x1>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy11: ethernet-phy@11 {
 					reg = <0x11>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy13: ethernet-phy@13 {
 					reg = <0x13>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 			};
 		};
diff --git a/target/linux/lantiq/dts/TDW8970.dts b/target/linux/lantiq/dts/TDW8970.dts
index a15d91c6a8..0fcf8d8d2a 100644
--- a/target/linux/lantiq/dts/TDW8970.dts
+++ b/target/linux/lantiq/dts/TDW8970.dts
@@ -100,22 +100,18 @@
 				phy0: ethernet-phy@0 {
 					reg = <0x0>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-//					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy5: ethernet-phy@5 {
 					reg = <0x5>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-//					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy11: ethernet-phy@11 {
 					reg = <0x11>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-//					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy13: ethernet-phy@13 {
 					reg = <0x13>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-//					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 			};
 		};
diff --git a/target/linux/lantiq/dts/VG3503J.dts b/target/linux/lantiq/dts/VG3503J.dts
index 340bfaae45..037563b7fa 100644
--- a/target/linux/lantiq/dts/VG3503J.dts
+++ b/target/linux/lantiq/dts/VG3503J.dts
@@ -126,12 +126,10 @@
 				phy11: ethernet-phy@11 {
 					reg = <0x11>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 				phy13: ethernet-phy@13 {
 					reg = <0x13>;
 					compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
-					lantiq,c45-reg-init = <1 0 0 0>;
 				};
 			};
 		};
-- 
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