From 667ac6c97025853f76a2f42ac259487249454247 Mon Sep 17 00:00:00 2001
From: Imre Kaloz <kaloz@openwrt.org>
Date: Wed, 16 Feb 2011 15:26:08 +0000
Subject: [PATCH] additional avr32 fixes
SVN-Revision: 25556
---
.../948-avr32_fix_reorg_opt_bug11763.patch | 32 +++++++++++++++++++
.../4.3.5/949-avr32_nan_by_zero_div.patch | 15 +++++++++
2 files changed, 47 insertions(+)
create mode 100644 toolchain/gcc/patches/4.3.5/948-avr32_fix_reorg_opt_bug11763.patch
create mode 100644 toolchain/gcc/patches/4.3.5/949-avr32_nan_by_zero_div.patch
diff --git a/toolchain/gcc/patches/4.3.5/948-avr32_fix_reorg_opt_bug11763.patch b/toolchain/gcc/patches/4.3.5/948-avr32_fix_reorg_opt_bug11763.patch
new file mode 100644
index 0000000000..6616640045
--- /dev/null
+++ b/toolchain/gcc/patches/4.3.5/948-avr32_fix_reorg_opt_bug11763.patch
@@ -0,0 +1,32 @@
+--- a/gcc/config/avr32/avr32.c
++++ b/gcc/config/avr32/avr32.c
+@@ -6501,12 +6501,23 @@ avr32_reorg_optimization (void)
+ continue;
+
+ set = single_set (scan);
+- if (set && rtx_equal_p (src_reg, SET_DEST (set)))
+- {
+- link = scan;
+- break;
+- }
+-
++ // Fix for bug #11763 : the following if condition
++ // has been modified and else part is included to
++ // set the link to NULL_RTX.
++ // if (set && rtx_equal_p (src_reg, SET_DEST (set)))
++ if (set && (REGNO(src_reg) == REGNO(SET_DEST(set))))
++ {
++ if (rtx_equal_p (src_reg, SET_DEST (set)))
++ {
++ link = scan;
++ break;
++ }
++ else
++ {
++ link = NULL_RTX;
++ break;
++ }
++ }
+ }
+
+
diff --git a/toolchain/gcc/patches/4.3.5/949-avr32_nan_by_zero_div.patch b/toolchain/gcc/patches/4.3.5/949-avr32_nan_by_zero_div.patch
new file mode 100644
index 0000000000..c5f880668a
--- /dev/null
+++ b/toolchain/gcc/patches/4.3.5/949-avr32_nan_by_zero_div.patch
@@ -0,0 +1,15 @@
+--- a/gcc/config/avr32/lib1funcs.S
++++ b/gcc/config/avr32/lib1funcs.S
+@@ -1852,7 +1852,11 @@ __avr32_f64_div_res_subnormal:/* Divide
+ mov r10, 0
+ ldm sp++, r0, r1, r2, r3, r4, r5, r6, r7,pc
+
+-17: /* Return INF. */
++17:
++ /* Check if op1 is zero. */
++ or r4, r10, r11
++ breq __avr32_f64_div_op1_zero
++ /* Return INF. */
+ mov r11, lr /*Get correct sign*/
+ andh r11, 0x8000, COH
+ orh r11, 0x7ff0
--
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