diff --git a/target/linux/ipq806x/config-4.4 b/target/linux/ipq806x/config-4.4
index 252e53a1409d64c53cbc34494e33e6bbfc7c3743..7094965dd2b3ba1c7da21c3b9ee6ba7d443c812f 100644
--- a/target/linux/ipq806x/config-4.4
+++ b/target/linux/ipq806x/config-4.4
@@ -49,6 +49,7 @@ CONFIG_ARM_L1_CACHE_SHIFT_6=y
 # CONFIG_ARM_LPAE is not set
 CONFIG_ARM_PATCH_PHYS_VIRT=y
 CONFIG_ARM_QCOM_CPUFREQ=y
+CONFIG_ARM_QCOM_CPUIDLE=y
 # CONFIG_ARM_SMMU is not set
 # CONFIG_ARM_SP805_WATCHDOG is not set
 CONFIG_ARM_THUMB=y
diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
index f09ec929198e7f4fe9c3353392c499e740aa8aa0..fcc08d91ae20c240a06a65c540f5c34f01b3635a 100644
--- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
+++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8065.dtsi
@@ -36,6 +36,7 @@
 			cooling-min-state = <0>;
 			cooling-max-state = <10>;
 			#cooling-cells = <2>;
+			cpu-idle-states = <&CPU_SPC>;
 		};
 
 		cpu1: cpu@1 {
@@ -54,6 +55,7 @@
 			cooling-min-state = <0>;
 			cooling-max-state = <10>;
 			#cooling-cells = <2>;
+			cpu-idle-states = <&CPU_SPC>;
 		};
 
 		L2: l2-cache {
@@ -65,6 +67,16 @@
 		qcom,l2 {
 			qcom,l2-rates = <384000000 1000000000 1200000000>;
 		};
+
+		idle-states {
+			CPU_SPC: spc {
+				compatible = "qcom,idle-state-spc",
+						"arm,idle-state";
+				entry-latency-us = <400>;
+				exit-latency-us = <900>;
+				min-residency-us = <3000>;
+			};
+		};
 	};
 
 	cpu-pmu {
diff --git a/target/linux/ipq806x/patches-4.4/181-cpuidle-Add-cpuidle-support-for-QCOM-cpus.patch b/target/linux/ipq806x/patches-4.4/181-cpuidle-Add-cpuidle-support-for-QCOM-cpus.patch
new file mode 100644
index 0000000000000000000000000000000000000000..b766ec07ec4cda62a1a718d56adf1b5fe5ecfad3
--- /dev/null
+++ b/target/linux/ipq806x/patches-4.4/181-cpuidle-Add-cpuidle-support-for-QCOM-cpus.patch
@@ -0,0 +1,29 @@
+From 252a4e72dfd7add3c37604449fd20db29d84c6f8 Mon Sep 17 00:00:00 2001
+From: Lina Iyer <lina.iyer@linaro.org>
+Date: Wed, 25 Mar 2015 14:25:29 -0600
+Subject: ARM: cpuidle: Add cpuidle support for QCOM cpus
+
+Define ARM_QCOM_CPUIDLE config item to enable cpuidle support.
+
+Cc: Stephen Boyd <sboyd@codeaurora.org>
+Cc: Arnd Bergmann <arnd@arndb.de>
+Cc: Kevin Hilman <khilman@linaro.org>
+Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
+Signed-off-by: Lina Iyer <lina.iyer@linaro.org>
+---
+ drivers/cpuidle/Kconfig.arm | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/drivers/cpuidle/Kconfig.arm
++++ b/drivers/cpuidle/Kconfig.arm
+@@ -74,3 +74,10 @@ config ARM_MVEBU_V7_CPUIDLE
+ 	depends on ARCH_MVEBU && !ARM64
+ 	help
+ 	  Select this to enable cpuidle on Armada 370, 38x and XP processors.
++
++config ARM_QCOM_CPUIDLE
++	bool "CPU Idle Driver for QCOM processors"
++	depends on ARCH_QCOM
++	select ARM_CPUIDLE
++	help
++	  Select this to enable cpuidle on QCOM processors.
diff --git a/target/linux/ipq806x/patches-4.4/176-add-saw_l2-into-ipq8064-DT.patch b/target/linux/ipq806x/patches-4.4/303-add-saw_l2-and-sns-into-ipq8064-DT.patch
similarity index 100%
rename from target/linux/ipq806x/patches-4.4/176-add-saw_l2-into-ipq8064-DT.patch
rename to target/linux/ipq806x/patches-4.4/303-add-saw_l2-and-sns-into-ipq8064-DT.patch
diff --git a/target/linux/ipq806x/patches-4.4/304-add-cpu-idle-state-into-ipq8064-DT.patch b/target/linux/ipq806x/patches-4.4/304-add-cpu-idle-state-into-ipq8064-DT.patch
new file mode 100644
index 0000000000000000000000000000000000000000..9a8795a3aebebfb254fc618f196c7215b0de9545
--- /dev/null
+++ b/target/linux/ipq806x/patches-4.4/304-add-cpu-idle-state-into-ipq8064-DT.patch
@@ -0,0 +1,60 @@
+From 3985d2c24d96f72211488fc6ebb53b032e4d0a05 Mon Sep 17 00:00:00 2001
+From: Pavel Kubelun <be.dissent@gmail.com>
+Date: Sun, 6 Nov 2016 19:02:34 +0300
+Subject: [PATCH] ipq806x: add cpu idle state into ipq8064 DT
+
+Signed-off-by: Pavel Kubelun <be.dissent@gmail.com>
+---
+ arch/arm/boot/dts/qcom-ipq8064.dtsi | 16 ++++++++++++++--
+ 1 file changed, 14 insertions(+), 2 deletions(-)
+
+diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+index cb9c41d..8c989c0 100644
+--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
+@@ -18,7 +18,7 @@
+ 		#address-cells = <1>;
+ 		#size-cells = <0>;
+ 
+-		cpu@0 {
++		cpu0: cpu@0 {
+ 			compatible = "qcom,krait";
+ 			enable-method = "qcom,kpss-acc-v1";
+ 			device_type = "cpu";
+@@ -31,9 +31,10 @@
+ 			clock-latency = <100000>;
+ 			cpu-supply = <&smb208_s2a>;
+ 			voltage-tolerance = <5>;
++			cpu-idle-states = <&CPU_SPC>;
+ 		};
+ 
+-		cpu@1 {
++		cpu1: cpu@1 {
+ 			compatible = "qcom,krait";
+ 			enable-method = "qcom,kpss-acc-v1";
+ 			device_type = "cpu";
+@@ -45,6 +46,7 @@
+ 			clock-names = "cpu", "l2";
+ 			clock-latency = <100000>;
+ 			cpu-supply = <&smb208_s2b>;
++			cpu-idle-states = <&CPU_SPC>;
+ 		};
+ 
+ 		L2: l2-cache {
+@@ -56,6 +58,16 @@
+ 		qcom,l2 {
+ 			qcom,l2-rates = <384000000 1000000000 1200000000>;
+ 		};
++
++		idle-states {
++			CPU_SPC: spc {
++				compatible = "qcom,idle-state-spc",
++						"arm,idle-state";
++				entry-latency-us = <400>;
++				exit-latency-us = <900>;
++				min-residency-us = <3000>;
++			};
++		};
+ 	};
+ 
+ 	cpu-pmu {